Information for "Config TIAO Universal JTAG Cable As A Buffered Xilinx Parallel Platform Cable III"
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10 PCS, 10cm x 10cm, 2 layers prototype for $38.80 shipped!
Basic information
| Display title | Config TIAO Universal JTAG Cable As A Buffered Xilinx Parallel Platform Cable III |
| Default sort key | Config TIAO Universal JTAG Cable As A Buffered Xilinx Parallel Platform Cable III |
| Page length (in bytes) | 4,482 |
| Page ID | 587 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | Admin (talk | contribs) |
| Date of page creation | 18:29, 1 October 2011 |
| Latest editor | Admin (talk | contribs) |
| Date of latest edit | 03:21, 15 May 2012 |
| Total number of edits | 11 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
10 PCS, 10cm x 10cm, 2 layers prototype for $38.80 shipped!
