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Line 27: |
Line 27: |
| This is the schematic of the official Xilinx Buffered Platform Cable III: | | This is the schematic of the official Xilinx Buffered Platform Cable III: |
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| + | [[Image:Xilinx.platform.cable3.jpg|none]] |
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− | The first step is to disassemble your router. In this example, the WRT54GS is very easy to disassemble. See reference here: [[Debrick Routers Using JTAG Cable]]. If you don't know how to disassemble your router, just search it on google :-) | + | The key points of the schematic are as follows: |
| | | |
− | == Locate the JTAG Header/Pin on the router's PCB board ==
| + | * PIN 2 of DB25 is TDI |
− | The JTAG pin on the WRT54GS is the JP2. See reference here: [[Debrick Routers Using JTAG Cable]]
| + | * PIN 3 of DB25 is TCK |
− | | + | * PIN 4 of DB25 is TMS |
− | == Install TUMPA Drivers ==
| + | * PIN 13 of DB25 is TDO |
− | Depending on your system, you can follow the following tutorials to install the drivers on your Windows machine:
| + | * PIN 8, 11 and 12 of DB25 are shorted (connected) |
− | | |
− | [[How to install TIAO USB Multi Protocol Adapter Driver on Windows XP]]
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− | | |
− | [[How to install TIAO USB Multi Protocol Adapter Driver on Windows Vista or Windows 7]]
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− | | |
− | Once the driver is installed, unplug TUMPA from your USB port.
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− | | |
− | == Make The Connections ==
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− | | |
− | Once you have identified the JTAG pins on your router, you can connect the router with TUMPA board with the supplied female to female flex cable now. We recommend to use the short cable.
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− | | |
− | The pinout on the router is as follows:
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− | | |
− | nTRST 1 2 GND
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− | TDI 3 4 GND
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− | TDO 5 6 GND
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− | TMS 7 8 GND
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− | TCK 9 10 GND
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− | nSRST 11 12 GND
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− | | |
− | | |
− | and the pinout one the TUMPA is:
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− | | |
− | | |
− | [[Image:tumpa.jtag.connector.1.png|none]]
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− | | |
− | {|
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− | ! align="left"|Pin #
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− | ! Description
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− | |-
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− | | 1
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− | | VTAR
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− | |-
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− | | 3
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− | | nTRST
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− | |-
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− | | 5
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− | | TDI
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− | |-
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− | | 7
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− | | TMS
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− | |-
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− | | 9
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− | | TCK
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− | |-
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− | | 11
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− | | RTCK
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− | |-
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− | | 13
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− | | TDO
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− | |-
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− | | 15
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− | | RST
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− | |-
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− | | 17
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− | | DBGRQ
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− | |-
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− | | 19
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− | | DBGACK
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− | |-
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− | | 2
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− | | Not Connected
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− | |-
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− | | 4, 6, 8, 10, 12, 14, 16, 18, 20
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− | | GND
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− | |}
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− | | |
− | | |
− | So, it is easy to make the connections: (Make sure both router and TUMPA are not powered on)
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− | | |
− | <pre>
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− | Use a flex female to female to connect TDI together (PIN 5 on Router to PIN 3 on TUMPA's 20 PIN JTAG Header
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− | Use a flex female to female to connect TCK together (PIN 9 on Router to PIN 9 on TUMPA's 20 PIN JTAG Header
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− | Use a flex female to female to connect TMS together (PIN 7 on Router to PIN 7 on TUMPA's 20 PIN JTAG Header
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− | Use a flex female to female to connect TDO together (PIN 13 on Router to PIN 5 on TUMPA's 20 PIN JTAG Header
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− | Use a flex female to female to connect GND together (PIN 4 on Router to PIN 4 on TUMPA's 20 PIN JTAG Header
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− | </pre>
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− | | |
− | So, it will look like this:
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− | | |
− | [[Image:Tumpa.wrt54tgs.jpg|none]]
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− | | |
− | OK, double check the connections, do not power on both router and TUMPA yet.
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− | | |
− | == Get zJTAG Ready ==
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− | | |
− | Download [[http://www.tiaowiki.com/download//category.php?id=8 zJTAG]] and unzip it to an empty directory. In my example, I unzipped it to d:\dev\debrick\zJTAG directory.
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− | | |
− | Double check connections make sure they are correct and secure. Then, connect router to the power outlet and connect TUMPA to your computer's USB port via an USB cable (USB A to Mini B, most digital cameras and camcorders use this kind of cable).
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− | | |
− | == Run zJTAG to Debrick Your Router ==
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− | | |
− | It's time to debrick your router now. First, open a DOS prompt window, run <pre>zjtag</pre> without parameters will give you all the command line options.
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− | | |
− | The following are useful commands:
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− | <pre>
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− | -probeonly -> Detect router's CPU and Flash chip.
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− | -erase:<area name> -> example: -erase:NVRAM
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− | -backup:<area name> -> example: -backup:CFE
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− | -flash:<area name> -> example: -flash:Kernel
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− | </pre>
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− | Also, the most important flag is <font color=red><b>JTAG clock speed divider</b></font> <pre>/L1:<divider></pre>. TUMPA can clock TCK as high as 30Mhz, however most router's CPU cannot handle such high clock speed, thus you will have to slow down the clock to make it work.
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− | | |
− | This is the formula:
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− | | |
− | <pre>Speed in KHz = 30000 / (divider + 1)</pre>
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− | | |
− | For example, if you give the following option:
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− | | |
− | <pre>/L1:3</pre>
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− | | |
− | The TCK clock speed is 7500KHz or 7.5MHz (30000/(3+1)).
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− | | |
− | Let's detect the CPU and Flash now by running the following command:
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− | | |
− | <pre>zJTAG -probeonly</pre>
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− | | |
− | [[Image:Wrt54gs.zjtag.30Mhz.jpg]]
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− | | |
− | As you can see from the above photo, the TCK is set to 30Mhz, however, zJTAG won't be able to detect the CPU and Flash.
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− | | |
− | Now if we run it with /L1:3 option:
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− | | |
− | <pre>
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− | zJTAG -probeonly /L1:3
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− | </pre>
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− | | |
− | [[Image:Wrt54gs.zjtag.7500Khz.jpg]]
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− | | |
− | Once we set the TCK to 7.5Mhz, now zJTAG is able to detect CPU and Flash for my WRT54GS.
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− | | |
− | | |
− | Most time, you only need to erase NVRAM, so let's do it:
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− | | |
− | <pre>
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− | | |
− | D:\dev\debrick\zjtag>zjtag.exe -erase:NVRAM /L1:3
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− | | |
− | ==============================================
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− | TUMPA EJTAG Debrick Utility V0.1
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− | ==============================================
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− | | |
− | | |
− | Set I/O speed to 7500 KHz
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− | | |
− | USB TAP device has been initialized. Please confirm VREF signal connected!
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− | Press any key to continue... ONCE target board is powered on!
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− | | |
− | Probing bus ... Done
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− | | |
− | Detected IR Length is 8
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− | | |
− | CPU assumed running under LITTLE endian
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− | | |
− | CPU Chip ID: 00010100011100010010000101111111 (1471217F)
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− | *** Found a Broadcom manufactured BCM4712 REV 01 CPU ***
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− | | |
− | - EJTAG IMPCODE ....... : 00000000100000000000100100000100 (00800904)
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− | - EJTAG Version ....... : 1 or 2.0
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− | - EJTAG DMA Support ... : Yes
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− | - EJTAG Implementation flags: R4k MIPS32
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− | | |
− | Issuing Processor / Peripheral Reset ... Done
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− | Enabling Memory Writes ... Done
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− | Halting Processor ... <Processor Entered Debug Mode!> ... Done
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− | Clearing Watchdog ... Done
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− | Loading CPU Configuration Code ... Skipped
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− | | |
− | Probing Flash at Address: 0x1FC00000 ...
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− | Detected Chip ID (VenID:DevID = 0089 : 0017)
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− | *** Found a Intel 28F640J3 4Mx16 (8MB) Flash Chip from Intel
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− | | |
− | - Flash Chip Window Start .... : 1C000000
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− | - Flash Chip Window Length ... : 00800000
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− | - Selected Area Start ........ : 1C7E0000
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− | - Selected Area Length ....... : 00020000
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− | | |
− | *** You Selected to Erase the NVRAM.BIN ***
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− | | |
− | =========================
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− | Erasing Routine Started
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− | =========================
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− | Total Blocks to Erase: 1
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− | | |
− | Erasing block: 64 (addr = 1C7E0000)...Done
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− | =========================
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− | Erasing Routine Complete
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− | =========================
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− | elapsed time: 3 seconds
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− | | |
− | | |
− | *** REQUESTED OPERATION IS COMPLETE ***
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− | | |
− | | |
− | D:\dev\debrick\zjtag>
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− | </pre>
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− | | |
− | It's always a good idea to check the result of an erase or flash by running a backup command to compare the output.
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− | | |
− | In the case of erase, after the action, each bit of the whole area should be 1 (or each byte should be 0xFF).
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− | In the case of flash, always use a binary comparator software to compare the backup image after the flash with the original one.
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− | | |
− | So, let's do a backup and see if erase command was indeed good:
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− | | |
− | <pre>
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− | | |
− | D:\dev\debrick\zjtag>zjtag.exe -backup:NVRAM /L1:3
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− | | |
− | ==============================================
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− | TUMPA EJTAG Debrick Utility V0.1
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− | ==============================================
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− | | |
− | | |
− | Set I/O speed to 7500 KHz
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− | | |
− | USB TAP device has been initialized. Please confirm VREF signal connected!
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− | Press any key to continue... ONCE target board is powered on!
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− | | |
− | Probing bus ... Done
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− | | |
− | Detected IR Length is 8
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− | | |
− | CPU assumed running under LITTLE endian
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− | | |
− | CPU Chip ID: 00010100011100010010000101111111 (1471217F)
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− | *** Found a Broadcom manufactured BCM4712 REV 01 CPU ***
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− | | |
− | - EJTAG IMPCODE ....... : 00000000100000000000100100000100 (00800904)
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− | - EJTAG Version ....... : 1 or 2.0
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− | - EJTAG DMA Support ... : Yes
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− | - EJTAG Implementation flags: R4k MIPS32
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− | | |
− | Issuing Processor / Peripheral Reset ... Done
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− | Enabling Memory Writes ... Done
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− | Halting Processor ... <Processor Entered Debug Mode!> ... Done
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− | Clearing Watchdog ... Done
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− | Loading CPU Configuration Code ... Skipped
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− | | |
− | Probing Flash at Address: 0x1FC00000 ...
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− | Detected Chip ID (VenID:DevID = 0089 : 0017)
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− | *** Found a Intel 28F640J3 4Mx16 (8MB) Flash Chip from Intel
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− | | |
− | - Flash Chip Window Start .... : 1C000000
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− | - Flash Chip Window Length ... : 00800000
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− | - Selected Area Start ........ : 1C7E0000
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− | - Selected Area Length ....... : 00020000
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− | | |
− | *** You Selected to Backup the NVRAM.BIN ***
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− | | |
− | =========================
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− | Backup Routine Started
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− | =========================
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− | | |
− | Saving NVRAM.BIN.SAVED_20110829_221700 to Disk...
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− | Done (NVRAM.BIN.SAVED_20110829_221700 saved to Disk OK)
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− | | |
− | bytes written: 131072
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− | =========================
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− | Backup Routine Complete
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− | =========================
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− | elapsed time: 4 seconds
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− | | |
− | | |
− | *** REQUESTED OPERATION IS COMPLETE ***
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− | | |
− | | |
− | D:\dev\debrick\zjtag>
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− | </pre>
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− | | |
− | Open the file <pre>NVRAM.BIN.SAVED_20110829_221700</pre> in any Hex editor (I use UltraEdit), as you see, it is all 0xFF:
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− | | |
− | [[Image:Wrt54gs.nvram.erased.jpg]]
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− | | |
− | This should resolve your problem. If this doesn't work, erase the kernel (firmware): <pre>zJTAG -erase:kernel /L1:3</pre> then reflash the kernel via TFTP (see [http://www.dd-wrt.com/wiki/index.php/TFTP_flash TFTP Flashing])
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− | | |
− | Or still doesn't work, you may need to flash CFE:
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− | | |
− | <pre>
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− | zJTAG -flash:CFE /L1:3
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− | </pre>
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− | | |
− | The CFE bin files in the repository all have MAC addresses that DO NOT MATCH your hardware, you will need to edit it before you flash it to your router. Please read [[Debrick Routers Using JTAG Cable]] first.
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− | | |
− | Again, to make sure flash is really successful, run a backup command after flash and compare the content with the original one to make sure.
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− | | |
− | If flash doesn't work or erase doesn't work, try to lower the speed by giving a larger divider, e.g. in my case, use
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− | | |
− | <pre>
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− | /L1:4
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− | </pre>
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− | | |
− | will decrease TCK to 6Mhz.
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− | | |
− | | |
− | One more suggestion is, always backup each area and whole flash before you do anything to it. You never know!
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In this tutorial, I am going to show you how to config it as a Xilinx Buffered Parallel Cable III to erase/read and program Xilinx CPLD.