Difference between revisions of "Config TIAO Universal JTAG Cable As A Buffered Xilinx Parallel Platform Cable III"
10 PCS, 10cm x 10cm, 2 layers prototype for $38.80 shipped!
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* PIN 8, 11 and 12 of DB25 are shorted (connected) | * PIN 8, 11 and 12 of DB25 are shorted (connected) | ||
| + | Thus, we can simulate the above schematic on TIAO Universal Buffered Parallel JTAG Adapter. | ||
| + | |||
| + | == Xilinx Buffered Platform Cable III Connections on TIAO Universal Buffered Parallel JTAG Adapter == | ||
| + | |||
| + | [[Image:Xilinx.on.ujtag-1.jpg|none|thumb]] | ||
| + | |||
| + | Basically, make the following connections: | ||
| + | <pre> | ||
| + | * Short DB25's pin 8, 11 and 12 | ||
| + | * Use female to female jumper wire to connect D2, D3, D4, D13 to A1, A2, A3, Y8 on TIAO Universal JTAG adapter respectively. | ||
| + | * Use female to female jumper wire to connect Y1, Y2, Y3, A8, GND, 3.3V to CPLD's TDI, TCK, TMS, TDO, GND and Vcc respectively. | ||
| + | </pre> | ||
| + | |||
| + | == Short DB25's PIN 8, 11 and 12 == | ||
| + | |||
| + | In this step, you need to solder wires to make DB25's PIN 8, 11 and 12 connected. | ||
| + | |||
| + | [[Image:Xilinx.81112.jpg|none|thumb]] | ||
| + | |||
| + | I soldered them together with the leg of a resistor: | ||
| + | |||
| + | [[Image:xilinx.81112-1.jpg|none|thumb]] | ||
Revision as of 18:56, 1 October 2011
Contents
Buy various JTAG cables for your Satellite Receiver, Cable Modem, Wireless Router, Standard Wiggler from http://www.easymg.com and http://www.diygadget.com
Overview
TIAO Universal Buffered Parallel JTAG Adapter is a multi-functional parallel JTAG adapter for hobbyists or engineers.
In this tutorial, I am going to show you how to config it as a Xilinx Buffered Parallel Cable III to erase/read and program Xilinx CPLD.
Required Hardware
Xilinx Buffered Platform Cable III Schematic
This is the schematic of the official Xilinx Buffered Platform Cable III:
The key points of the schematic are as follows:
- PIN 2 of DB25 is TDI
- PIN 3 of DB25 is TCK
- PIN 4 of DB25 is TMS
- PIN 13 of DB25 is TDO
- PIN 8, 11 and 12 of DB25 are shorted (connected)
Thus, we can simulate the above schematic on TIAO Universal Buffered Parallel JTAG Adapter.
Xilinx Buffered Platform Cable III Connections on TIAO Universal Buffered Parallel JTAG Adapter
Basically, make the following connections:
* Short DB25's pin 8, 11 and 12 * Use female to female jumper wire to connect D2, D3, D4, D13 to A1, A2, A3, Y8 on TIAO Universal JTAG adapter respectively. * Use female to female jumper wire to connect Y1, Y2, Y3, A8, GND, 3.3V to CPLD's TDI, TCK, TMS, TDO, GND and Vcc respectively.
Short DB25's PIN 8, 11 and 12
In this step, you need to solder wires to make DB25's PIN 8, 11 and 12 connected.
I soldered them together with the leg of a resistor:
Buy various JTAG cables for your Satellite Receiver, Cable Modem, Wireless Router, Standard Wiggler from http://www.easymg.com and http://www.diygadget.com
10 PCS, 10cm x 10cm, 2 layers prototype for $38.80 shipped!
