Config TIAO Universal JTAG Cable As A Buffered Xilinx Parallel Platform Cable III

Overview

TIAO Universal Buffered Parallel JTAG Adapter is a multi-functional parallel JTAG adapter for hobbyists or engineers.

In this tutorial, I am going to show you how to config it as a Xilinx Buffered Parallel Cable III to erase/read and program Xilinx CPLD.

This is the schematic of the official Xilinx Buffered Platform Cable III:

The key points of the schematic are as follows:

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